The present invention relates to a novel configuration for communication between processors in a multi-processor system in which a plurality of central processing units (CPUs) are coupled to one or more shared memories, and a communication method used therewith.
In a tightly coupled multi-processor system (TCMP), one operating system is provided and unified management is performed for the configuration of processors by the operating system. Moreover, a connection path between the processors is fixed by hardware.
On the other hand, for example to an information processing system in which a plurality of processors are operated by independent operating systems, respectively, and are loosely coupled to one another through a common memory (shared memory), is described in Japanese patent un-examined publication No. JP-A-64-78361 (corresponding to copending U.S. patent application Ser. No. 07/209,073 filed Jun. 20, 1988), U.S. Pat. No. 5,201,040. In JP-A-64-78361, it is described that an instruction equal to a signal processor instruction, used for communication between the processors, is used between the processors by the loosely coupled multi-processor system through the shared memory to perform the communication. However, it is not described that a processor number and a shared memory number are dynamically changed to perform the communication. Further, in JP-A-64-78361, it is not also described that when a processor of a virtual machine (hereinafter, referred to as simply "a virtual processor" when applicable) simulated on a real machine performs the communication with another 10 virtual processor through the shared memory, that communication is performed without reading out the storage data of the shared memory in order to recognize a virtual processor number.
In the technology described in JP-A-64-78361, it is not taken into consideration that when the communication between the processors is performed through the shared memory, the connection path between the processor and the shared memory, or a processor number and a shared memory number, are not changed without stopping the system. Then, there arises a problem in that if the system configuration or the like is changed, the whole system must be stopped.
Moreover, in the case where the communication between the virtual processors is performed through the shared memory, the storage data of the shared memory is read out to recognize a virtual processor number. Therefore, in the communication between the processors, there arises another problem in that the communication can be performed until the storage data is frequently read out from the shared memory to go through the complicated procedure.